The present invention relates to a flip-flop circuit comprising complementary MOS transistors.
FIG. 1 is a logical diagram showing a well known flip-flop circuit of set-reset (S-R) type. S represents a set signal, R a reset signal, Q a set output which becomes logic "1" when set, and Q a reset output which is an inverted signal of set output Q.
As shown in FIG. 2, it is assumed that set signal S is formed by the logical product .phi..sub.S .multidot.f.sub.S of two signals .phi..sub.S and f.sub.S, and that reset signal R is formed by the logical product .phi..sub.R .multidot.f.sub.R of two signals .phi..sub.R and f.sub.R. However, it is also assumed that signals .phi..sub.S and .phi..sub.R do not become logic "1" simultaneously and that signals f.sub.S and f.sub.R do not change during the time when signals .phi..sub.S and .phi..sub.R are logic "1".
When the flip-flop circuit shown in FIG. 2 is formed by a complementary type of MOS (CMOS), it will become a circuit shown in FIG. 3. This circuit comprises a driver circuit consisting of six N-channel MOS transistors Tr1 to Tr3 and Tr7 to Tr9 and a load circuit consisting of six P-channel MOS transistors Tr4 to Tr6 and Tr10 to Tr12. First set signal .phi..sub.S is supplied to gates of transistors Tr1 and Tr5, and second set signal f.sub.S is supplied to gates of transistors Tr2 and Tr6. First reset signal .phi..sub.R is supplied to gates of transistors Tr7 and Tr11 and second reset signal f.sub.R is supplied to gates of transistors Tr8 and Tr12. The flip-flop circuit using this CMOS is of static type.
When the number of inputs is small as shown in FIG. 1, the number of circuit elements may be small even if the flip-flop circuit of static type is formed by a CMOS circuit of static type, and the area occupied by this flip-flop circuit is not so larger than when the flip-flop circuit is formed using a dynamic circuit. However, when the number of inputs becomes large as shown in FIG. 2, the static flip-flop circuit is increased in the number of elements used and occupies an area larger than when it is formed using the dynamic circuit.
When input condition is complicated, conventional static flip-flop circuits had such drawback that their integration was low. In addition, because static circuits had a large input capacitance, their operation speed was slow and their current consumption was large.